Google has finalized the design of its Tensor G5 chip intended for the Pixel 10 series, marking a significant stride in its technological ambitions. Reports indicate that Google has completed the design phase of the SoC, poised to power the Pixel 10 devices slated for release in 2025. This achievement, known as “tape out,” signals that Google can now proceed to the production phase with a foundry, such as Taiwan Semiconductor Manufacturing Company (TSMC), leveraging their advanced 3nm technology. Unlike previous iterations that relied on Samsung’s Exynos designs, the Tensor G5 represents Google’s inaugural fully customized silicon for Pixel phones. This strategic move allows Google to tailor the chip’s performance specifically to enhance the competitive edge of the upcoming Pixel 10 series, addressing areas such as battery efficiency and thermal management.

By developing its own chip from scratch, Google has the opportunity to customize the performance characteristics of the Tensor G5 to specifically meet the requirements of Pixel devices.

This approach holds the potential for substantial enhancements in areas where previous Tensor chips received criticism, such as optimizing battery life and managing thermal performance.

Google has entered into a partnership with Taiwan Semiconductor Manufacturing Company (TSMC) for the production of the Tensor G5. This collaboration will leverage TSMC’s advanced second-generation 3nm node (N3E), offering several potential benefits over earlier manufacturing technologies.

Moving to this more advanced node could lead to a smaller chip size and improved energy efficiency. Furthermore, the ability to fit more transistors into a smaller space may result in significant performance improvements, particularly in AI and machine learning applications, which are pivotal to Google’s smartphone strategy.